February 24th, 2008
Leaked Intel Nehalem performance projections over AMD Shanghai
It appears that the rumors about Intel’s next major microprocessor “Nehalem” being a huge juggernaut may be true according to leaked documents from Sun Microsystems (removed Sunday night). The slides appear to be inadvertently placed on Sun’s publicly accessible website and “jokerman” posted the link on Aceshardware (thanks to tip from ZDNet reader JumpingJack). The slides looks like the real thing meant for Intel’s partners and they’re probably well known in the server industry.
Reliable sources have reported in the past that Intel’s Nehalem processor will have three channels of DDR3 memory per CPU versus two channels of DDR2 memory per AMD Barcelona or upcoming Shanghai processor. That would mean that AMD’s massive memory bandwidth advantage will turn in to a large memory bandwidth. So what does this mean for Intel Nehalem’s performance? Take a look at the following charts I generated after carefully measuring the length of the performance bars on a pixel level.
Since Intel’s charts were normalized to an Intel E5160 dual-core processor on SPECint_rate_base2006 and SPECfp_rate_base2006, I had to start somewhere and make some guesses on the base performance. I used Intel’s highest published SPEC CPU integer and floating point score of 60.8 and 45.1 for the E5160 processor as of 2/23/2007. This is probably not the exact reference point that Intel used so the numbers might be off a little.
When I compared my extrapolated numbers to the published SPECint scores for all of the shipping products other than the E5160, I found that Integer performance was 2% to 7% too low and the average was 4%. When I compared with published SPECfp scores other than the E5160, I found that my extrapolated numbers were all 4% too high for all models except the Opteron 2220 extrapolation which was 12% too high. To adjust for this, I raised the SPECint estimates 4% and dropped the SPECfp estimates 5% and generated the following chart which is a closer match to the published scores.
I tend to believe that the second adjusted chart is more accurate. We’ll most likely know by the end of this year what the actual scores are, but I doubt they will be more than 5% to 10% off from these estimated projections.
So how can Intel pull off such a massive performance boost over their current reigning champion “Harpertown” X5482 processor? Consider the fact that Intel’s current generation 45nm Harpertown processors lead the benchmarks despite the memory bandwidth disadvantage because of a much faster execution engine and larger cache. Then we factor in the fact that Intel will implement SMT (dual threads per CPU core), improve the already-fast execution engine of Harpertown, and feed it with three channels of DDR3 memory per CPU instead of the old shared front side bus. AMD’s Shanghai on the other hand is essentially a die shrink, a cache size boost, and a clock speed boost. Taking all these things in to consideration would easily explain how Intel could widen the lead so far.
I would also note that Intel’s leaked slides compare these processors in pairs where the Opteron 2220 DC (Dual Core) faces off with the Intel E5160 DC processor and the 2222 faces the X5365. These two pairs represent a snapshot in time to when the products competed against each other. The last two pairings on top may be generous to AMD since Barcelona processors aren’t shipping yet because of the TLB bug whereas Intel launched the X5482 in November 2007. AMD’s Shanghai processor didn’t have first silicon until four months after Intel showed off their first silicon at spring IDF 2007 in September, but the difference is that Intel has showed the Nehalem running a real Operating System while AMD has not done the same for Shanghai.
Since it usually takes one year from first silicon to production parts, it’s a bit hard to believe that Shanghai will ship at the same time as Nehalem. But even if it does ship at the same time as Nehalem, the competition from Intel looks very daunting if these estimates are anywhere close to being accurate.
George Ou is Technical Director of ZDNet. See his full profile and disclosure of his industry affiliations.
